Non-volatile semiconductor memory device
US6813214B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2003 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Oct 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2245
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device includes a plurality of page buffers, each corresponding to a sense node. Voltages of a first set of sense nodes are varied according to states of corresponding memory cells during a first sense period, while voltages of a second set of sense nodes are fixed at a predetermined voltage. During the second sense period, voltages of the second set of sense nodes are varied according to states of corresponding memory cells, while voltages of the first set of sense nodes are fixed at a predetermined voltage. Using this sensing scheme, even though a sense node corresponding to an OFF cell is floated, a voltage of the floated sense node is not coupled down when a voltage of a neighboring sense node corresponding to an ON cell is lowered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.