Apparatus and method for test mode control
US6813579B1 · kind B1 · utility
4Cited by
11References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Oct 27, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31701
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test mode control unit of an integrated circuit receives and decodes a test mode signal to perform testing of the integrated circuit. Logical AND operations are performed on the decoded test control signal and a test signal. The test signal allows the integrated circuit to toggle between test and non-test modes of operation. In one instance, the toggling allows real time debugging of the integrated circuit when test data outputs of internal signals or states are multiplexed onto a data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.