Interface device for ethernet transceiver and 1394 controller
US6813651B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2001 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Dec 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/40097
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An interface device allows communication between a 1394 device and an Ethernet via an 802.3 PHY. To the 1394 link, the device appears as a 1394 PHY, to the 802.3 PHY, the device appears as an 802.3 MAC. The interface device includes a 1394 PHY-link link interface, a Gigabyte Media Independent Interface (GMII), checksum padding and checksum stripping units, emulated 1394 PHY registers, and a clock generation unit. The interface device uses two clocks to supply timing clocks for the 1394 link and for the 802.3 PHY. For speed matching, the interface device matches the data rate of the link (S100, S200, S400, S800) with the PHY (nominally 1 Gbps) using a padding algorithm. The interface device provides the link with management information through a set of IEEE 1394 compatible registers that are accessed through the 1394 interface, emulating a single port 1394 PHY. The interface device also manages the IEEE 802.3 PHY as would a MAC through the MDC/MDIO interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.