Frequency sensor for each interface of a data carrier
US6814295B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2001 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Oct 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K19/0724
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data carrier (4) for the transfer of communication data (KD1, KD2) via at least two interface means (11, 12), having first interface means (11) for receiving a first communication signal (KS1), and having second interface means (12) for receiving a second communication signal (KS2), and having processing means (13) to which a first clock signal (TS1) derived from the first communication signal (KS1) or a second clock signal (TS2) derived from the second communication signal (KS2) can be applied for the processing of the transferred communication data (KD1, KD2), and having reset means (21) for resetting the processing by the processing means (13), now includes a first frequency sensor (22) which is adapted to supply first frequency reset information (RI4) to the reset means (21) when a first clock frequency of the first clock signal (TS1) or the frequency (FKS1) of the first communication signal (KS1) lies below a first lower frequency threshold (FU1), and includes a second frequency sensor (23) which is adapted to supply second frequency reset information (RI5) to the reset means (21) when a second clock frequency of the second clock signal (TS2) or the frequency (FKS2) of the s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.