Integrated capacitor for sensing the voltage applied to a terminal of an integrated or discrete power device on a semiconductor substrate

US6815798B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Natale Aiello · Trecastagni, IT
• Davide Giuseppe Patti · Mascalucia, IT

Key dates

• Filing date: May 15, 2003
• Grant date: Nov 9, 2004
• Expiry date: May 15, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/66

Abstract

A capacitor for sensing a substrate voltage in an integrated circuit power device may be implemented by isolating a portion or segment of the metal layer that normally covers the heavily doped perimeter region typically used for electric field equalization. In conjunction, one or more portions of an isolation dielectric layer of silicon oxide are not removed from the surface of the semiconductor substrate, as is commonly done before depositing the metal layer. The portions of isolated silicon oxide which are not removed become the dielectric layer of the capacitor. Moreover, one plate of the capacitor is formed by the heavily doped perimeter region that is electrically connected to the substrate (e.g. a drain or collector region). The other plate is formed by the segment of metal isolated from the remaining metal layer defined directly over the heavily doped perimeter region.