Vertical bipolar transistor and a method of manufacture therefor including two epitaxial layers and a buried layer

US6815801B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Gregory Romas · McKinney, US
• Darrel C. Oglesby, Jr. · Sherman, US
• Scott F. Jasper · Sherman, US
• Philip Najfus · Sherman, US
• Venkatesh Govindaraju · McKinney, US
• ChunLiang Yeh · Allen, US
• James Lisenby · Sherman, US

Key dates

• Filing date: Feb 28, 2003
• Grant date: Nov 9, 2004
• Expiry date: Feb 28, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/673

Abstract

The present invention provides a vertical bipolar transistor 110, a method of manufacture therefor, and an integrated circuit including the same. The vertical bipolar transistor 110 may include, in one embodiment, a second epitaxial layer 140 located over a first epitaxial layer 130, wherein the second epitaxial layer includes at least two dopant profiles 143, 147. The vertical bipolar transistor 110 may further include a collector 154, a base 156 and an emitter 158 located over or within the second epitaxial layer 140.