Automatically calibrated phase locked loop system and associated methods
US6816019B2 · kind B2 · utility
39Cited by
4References
44Claims
0Family size
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Key dates
| Filing date | Jun 18, 2002 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Jul 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/113
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for automatically calibrating a phase locked loop (PLL) system includes estimating a frequency value of an input signal applied to the system. Based on the estimated frequency value, a driving signal is generated for a plurality of internal switches in the PLL system. A PLL system may also implement this automatic calibration method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.