Method of fabricating an integrated optoelectronic circuit

US6818466B2 · kind B2 · utility

Assignee

• General Electric Company · US

Inventors

• William P. Kornrumpf · Schenectady, US
• Glenn Scott Claydon · Wynantskill, US
• Samhita Dasgupta · Niskayuna, US
• Robert John Filkins · Niskayuna, US
• Glenn Forman · Niskayuna, US
• Joseph Alfred Iannotti · Glenville, US
• Matthew Christian Nielsen · Scotia, US

Key dates

• Filing date: Dec 4, 2003
• Grant date: Nov 16, 2004
• Expiry date: Dec 11, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G02F1/0121
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

A method of fabricating an integrated optoelectronic circuit. The method includes positioning a microchip on a first flexible dielectric substrate. A polymer electro-optic waveguide is positioned on or within the first flexible dielectric substrate. A ground electrode is positioned along the electro-optic waveguide. A signal electrode is positioned along the electro-optic waveguide opposite the ground electrode. A first patterned metallization layer is applied to the first flexible dielectric substrate. A second flexible dielectric substrate is positioned along the first flexible dielectric substrate. A plurality of via openings are provided in the first and second flexible dielectric substrates. A second patterned metallization layer is applied to the second flexible dielectric substrate.