Method of manufacturing semiconductor device with shallow trench isolation
US6818527B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 26, 2002 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Nov 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of manufacturing a semiconductor device, a semiconductor substrate having device regions and an isolation region for separating the device region is provided. Then, a trench is formed in the isolation region of the semiconductor substrate. A nitride film is formed on the device regions of the semiconductor substrate. Next, an oxide film is formed within the trench and on the nitride film so that an upper surface of the oxide film within the trench is located more than about 500 å below an upper surface of the nitride film. Finally, the oxide film is polished by CMP method so that a height of the upper surface of the oxide film within the trench portion is maintained at less than a height of the upper surface of the nitride film adjacent thereto.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.