Semiconductor memory device with offset-compensated sensing scheme
US6819600B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2003 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Jun 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor memory device which includes an offset-compensated amplifier circuit. The offset-compensated amplifier circuit enables a flip-flop sense amplifier to perform a stable sensing operation irrespective of its own offset voltage. A part of the offset-compensated amplifier circuit is located in a first region (for example, a region that includes the flip-flop sense amplifier), and the other thereof is located in a second region (for example, a region where drivers related to the flip-flop sense amplifier are located). With this distributed arrangement structure, an offset-compensated amplifier circuit can be obtained n the semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.