Self-route multi-memory expandable packet switch with overflow processing means
US6819675B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2001 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Aug 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/506
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Data transmission system comprising a plurality of Local Area Networks (LANs)(10-1 to 10-4) interconnected by a hub (12) including the same plurality of LAN adapters (16-1 to 16-4) respectively connected to the LANs and a packet switch (14) comprising at least a packet switch module interconnecting all LAN adapters wherein a packet transmitted by any adapter to the packet switch includes a header containing at least the address of the adapter to which the packet is forwarded. At each cross point is located a memory block for storing any data packet received from the input port corresponding to the cross point and which is to be forwarded to the output port corresponding to the cross point. The system comprises a memory control circuit associated with each memory block within the packet switch for detecting an overflow, a regulating circuit for preventing a further data packet from being stored in the memory block which overflows in response to the memory control block, and an overflow bus for carrying the data packet to another memory block which does not overflow and corresponding to the same output port as the memory block which overflows.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.