Method and apparatus to perform division in hardware
US6820108B2 · kind B2 · utility
0Cited by
4References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2001 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Mar 2, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/5355
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with the preferred embodiment of the present invention a gain (A) is determined and utilized to cyclically converge upon a quotient (Q). More particularly, once A is determined, an estimate of QN is multiplied by Y to estimate {circumflex over (X)}N, where Q=X/Y. The value of {circumflex over (X)}N is then subtracted from X to determine an error (eN), which is multiplied by A. The value of AeN(n) is added to AeN(n−1) to produce an estimate of Q. Once convergence has occurred, the value for Q is output from the circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.