Central processing unit for easily testing and debugging programs
US6820192B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2001 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Feb 1, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A central processing unit (CPU) for easily testing and debugging an application program, which includes a data communications unit for performing data communications with a host computer, a status register having a flag representing whether an operational mode of the CPU is a general operational mode representing a general operational state or a debugging mode representing a debugging state, a debugging stack pointer register which is used as a stack pointer designating a stack memory storing data of a debugging program, and a comparator for comparing a value stored in a break register with break data, wherein the CPU is converted into the debugging mode if the break register value is same as the break data, the flag of the status register has a value representing a debugging mode, a start address for performing a debugging program is loaded in a program counter, and the debugging program is executed to perform a debugging according to a command from the host computer via the data communications unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.