Method and apparatus for accelerating fault handling
US6820216B2 · kind B2 · utility
5Cited by
12References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2001 |
| Grant date | Nov 16, 2004 |
| Priority date | — |
| Expiry date | Jun 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process which stores an indication of a next instruction in a sequence of instructions which is to be executed whenever during execution of instructions of the sequence it is apparent that state of the process is consistent, and refers to the stored indication to determine an instruction at which to begin re-execution of the sequence after executing a fault handler initiated by an interrupt to the sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.