No resonance mode bang-bang phase detector
US6822483B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2002 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Apr 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R25/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A bang-bang phase detector circuit for use in a delay lock loop is disclosed. The phase detector includes a data signal line, a clock signal line, and a delay cell having an input coupled to the data signal line. The phase detector further includes a first double flip-flop having a data input coupled to the data signal line and a clock input coupled to the clock signal line, and a second double flip-flop having a data input coupled to an output of the delay cell and a clock input coupled to the clock signal line. A NOR circuit has a first input coupled to an output of the first double flip-flop and a second input coupled to an output of the second double flip-flop. The phase detector provides a lag output signal line coupled to an output of the NOR circuit, and a lead output signal line coupled to the output of the second double flip-flop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.