Digital to digital Sigma-Delta modulator and digital frequency synthesizer incorporating the same
US6822593B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2003 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | May 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3022
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital to digital Sigma-Delta modulator comprises an input which receives a digital input value encoded over N bits, an output which delivers a digital output value encoded over n bits, where n is less than N, and at least a first Sigma-Delta cell which includes a quantizer having a quantization interval which is a prime number. The choice of a prime number decreases the power of the limit cycles (lines with a power value higher than the local mean value) which may appear depending on the input code of the modulator and on the initial conditions. Application is proposed to a digital frequency synthesizer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.