Analog/digital converter that employs phase comparison
US6822596B2 · kind B2 · utility
18Cited by
7References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 5, 2002 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Nov 5, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/64
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog/digital converter includes a first transfer circuit which receives an input voltage and outputs an output clock signal having a phase delay that is dependent on the input voltage, a second transfer circuit which receives a reference voltage and an input clock signal and outputs a reference clock signal having a phase delay that is dependent on the reference voltage, and a comparator which compares the output clock signal and the reference clock signal and outputs a digitally-coded output signal that is based on the result of the phase comparison of the output clock signal and the reference clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.