Gate driver with a DC offset bias circuit and a power converter employing the same
US6822882B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2003 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Aug 1, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A gate driver and a method of driving a switch for use with a power converter having a main active clamp circuit associated with a main power switch coupled to a primary winding of a transformer and a rectifier switch coupled to a secondary winding of the transformer. The main power switch conducts during a main conduction period of the power converter and the rectifier switch conducts during an auxiliary conduction period of the power converter. In one embodiment, the gate driver includes a DC offset bias circuit, coupled to a secondary winding of the transformer, that provides a gate drive signal having a DC bias voltage to a gate terminal of the rectifier switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.