Coherency control module for maintaining cache coherency in a multi-processor-bus system
US6823409B2 · kind B2 · utility
24Cited by
18References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Nov 16, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/082
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism for efficiently filtering snoop requests in a multi-processor bus system. Specifically, a snoop filter is provided to filter unnecessary snoops in a multi-bus system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.