Circuit and method for adjusting the clock skew in a communications system
US6823466B2 · kind B2 · utility
0Cited by
4References
43Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Jun 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31937
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit and method are disclosed for adjusting the clock skew in a synchronous system. The circuit and method include initially applying an offset voltage to a data input of a device in the system. Next, the clock skew between a device and a data source providing data thereto is adjusted to approximately 180 degrees, by selecting the clock skew resulting in an approximately maximum DC offset appearing at the output of the device. Thereafter, the clock skew is shifted from approximately 180 degrees to the desired clock skew amount.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.