Patent · US Expired

Method and user interface for debugging an electronic system

US6823497B2 · kind B2 · utility

123Cited by

103References

41Claims

0Family size

Assignee

Synplicity, Inc. · US

Inventors

Nils Endric Schubert · San Jose, US
John Mark Beardslee · Menlo Park, US
Gernot Heinrich Koch · Philippsburg, DE
Olaf Poeppe · San Jose, US

Key dates

Filing date	Jul 31, 2002
Grant date	Nov 23, 2004
Priority date	—
Expiry date	Jul 31, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG06F2117/08
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.