Method for shallow trench isolation and shallow trench isolation structure
US6825544B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 9, 1998 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Dec 9, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Shallow trench isolation methods and corresponding structures are disclosed. According to one embodiment (900) a nitride layer (1006), having an opening (1014), is formed over a silicon substrate (1002). The portion of the substrate (1002) below the opening (1014) is oxidized to form a substrate consuming rounding oxide layer (1018). The formation of the rounding oxide layer (1018) results in rounded edges in the substrate (1002). An isotropic, or alternatively, an anisotropic rounding oxide etch removes the rounding oxide layer (1018) to expose the substrate (1002). A trench (1026) can be formed by applying a silicon etch using the nitride layer (1006) as an etch mask. The trench (1026) can be subsequently filled with a deposited trench isolation material (1030).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.