Semiconductor device and its manufacturing method, a circuit board and an electronic device
US6825571B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Feb 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A raised portion 12 is formed on a substrate 10. The raised portion consists of a raised support pattern that preferably includes a wiring pattern. A sheet 30 is supported by the top surfaces of the raised support pattern such that the sheet is maintained apart from the base surface of the substrate 10. A semiconductor die 40 is adhered onto the sheet 30 using an adhesive agent 42. A sealant is used to create a sealed portion 50 that seals the semiconductor die 40 on the sheet 30. The sheet 30 has gas permeable region at least at a location accessible by the adhesive agent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.