Dual-stage comparator unit
US6825696B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2001 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Aug 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/249
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A comparator unit includes a first amplifier stage and a second amplifier stage. The first amplifier stage includes a differential amplifier having a pair of input nodes for receiving a differential signal and a pair of output nodes, a switch connected across the pair of output nodes, and a non-linear load connected across the pair of output nodes. The second amplifier stage is coupled to the pair of output nodes of the first amplifier stage. In one embodiment the second amplifier stage is a non-linear amplifier. In an alternative embodiment, the differential amplifier is a differential pair. In another alternative embodiment, the differential amplifier is a pair of differential pairs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.