High-performance track and hold circuit
US6825697B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Oct 20, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for sampling and holding a signal. The invention includes a novel input circuit for a track and hold circuit comprising a circuit Q1 for receiving an input signal including an input node, a first output node N1, and a path connecting the input and output nodes; a current switching circuit for applying a first current to the node N1 during a first mode of operation but not during a second mode; and a current source for applying a second current to the node N1 during both of the first and second modes. The value of the first current is determined such that the total current in the path is constant during the first and second modes. In an illustrative embodiment, the first mode is a track mode and the second mode is a hold mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.