Semiconductor device and method for testing the same
US6826101B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 28, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | May 28, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, according to the present invention, includes an external input terminal to which first and second input test signals are supplied; a memory circuit, in which a test operation is performed in accordance with the first input test signal to provide a first test result signal; a logic circuit, in which a test operation is performed in accordance with the second input test signal to provide a second test result signal; an external output terminal from which the first and second test result signals are outputted selectively; and a switch circuit which selectively couples the memory circuit and the logic circuit to the external input terminal and the external output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.