Optimal location of a digital sync pattern
US6826245B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2000 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | May 12, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2020/1287
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Method and system for optimally estimating the location of each of a sequence of two or more synchronization patterns in a digital signal bit stream. A first reference location for a sync pattern is determined. A Boolean product or other product of the sync pattern (of length S) with S consecutive bit values of the digital stream is formed, for each of a selected consecutive sequence of candidates for a second reference location of the sync pattern within a window of selected length. A candidate reference location that yields the largest (or smallest) product value within the window is estimated to be a second or “next” reference location of the sync pattern, if the product value is at least equal to (or, alternatively, is no greater than) a selected threshold value. The sync pattern used for testing the digital stream can be varied from one location to another. The number of bit matches or the number of bit non-matches can be used to determine an optimal reference location for the sync pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.