Precision electroplated solder bumps and method for manufacturing thereof
US6828677B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2002 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Mar 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/3473
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A solder bump structure for use on a substrate. The solder bump structure includes a multilayer underbump metallization having a major upper surface with a solder wetable caplayer for contacting a solder bump, the mutilayer underbump metallization projecting from the substrate with an exposed sidewall; a thin layer of a metal selected from a group consisting of titanium, chrome, a titanium-nickel-titanium composite, a titanium-nickel-chrome composite, a titanium-platinum-titanium alloy, and a titanium-nickel-oxidized silicon composite deposited over or under the multilayer underbump metallization and covering the exposed sidewall of the multilayer underbump metallization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.