High-efficiency driver circuit for capacitive loads
US6828712B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2002 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Jun 18, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N30/802
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.