Signal processing circuit for a digital signal receiving system
US6829298B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2000 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Mar 17, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0055
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A signal processing circuit for a digital signal receiving system includes an equalization unit for performing waveform-equalization of a received signal, the equalization unit including a backward equalizer constituted by a feedback loop; and a phase compensation unit for performing phase compensation of the received signal. The phase compensation unit is arranged upstream of the backward equalizer. Thus, it is possible to avoid the deterioration of the phase compensation ability of the phase compensation unit by the affection from the echo in the transmission path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.