Method and system for efficiently overriding array net values in a logic simulator machine
US6829572B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2000 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Nov 14, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system are described for efficiently overriding a value of a net in an array during execution of a test routine. The logic simulator machine is simulating a logic design which includes the array and multiple nets. A current value of the net is set equal to an override value. A normal update to the array is permitted to occur during execution of a single cycle of the test routine. A determination is then made regarding whether the override value is still stored in the array for the particular net. If the override value is not still stored in the array for this net, normal updates to the array are prohibited during a single cycle of the test routine. During this cycle of the test routine, the override value is then again stored in the net as the current value of the net. This override value is thus made available to be read during this cycle of the test routine while writes to the array are disabled. Normal updates are then again permitted to occur to the array in subsequent cycles of the test routine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.