Reconfigurable parallel look up table system
US6829694B2 · kind B2 · utility
8Cited by
16References
6Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 24, 2002 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Feb 8, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0207
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable parallel look-up table system includes a memory; a plurality of look-up tables stored in the memory; a row index register for holding the values to be looked up in the look-up tables; a column index register for storing a value representing the starting address of the look-up tables stored in the memory; and an address translation circuit responsive to the column index register and the row index register to simultaneously generate an address for each value in the row index register to locate in parallel the function of those values in each look-up table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.