Quick punch through IGBT having gate-controllable DI/DT and reduced EMI during inductive turn off

US6831329B2 · kind B2 · utility

Assignee

• FAIRCHILD SEMICONDUCTOR CORPORATION · US

Inventors

• Joseph A. Yedinak · Mountain Top, US
• Jon Gladish · Pittston, US
• Sampat Shekhawat · Smethport, US
• Gary M. Dolny · Smethport, US
• Praveen Muraleedharan Shenoy · Kochi, IN
• Douglas Lange · Smethport, US
• Mark L. Rinehimer · Smethport, US

Key dates

• Filing date: Oct 22, 2002
• Grant date: Dec 14, 2004
• Expiry date: Oct 22, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/393

Abstract

A quick punch-through integrated gate bipolar transistor (IGBT) includes a drift region and a gate. The drift region has a drift region dopant concentration and a drift region thickness. The gate has a gate capacitance. The drift region dopant concentration, drift region thickness and gate capacitance are adjusted dependent at least in part upon the PNP gain of the IGBT to maintain the potential difference between the gate and emitter at a level greater than the IGBT threshold voltage when the collector voltage reaches the bus voltage. This insures that the hole carrier concentration remains approximately equal to or greater than the drift region dopant concentration when the depletion layer punches through to the buffer region during the turn-off delay. Thus, the collector voltage overshoot and the rate of change of voltage and current are controlled, and electromagnetic interference is reduced, during turn off.