Low-voltage high-speed frequency-divider circuit
US6831489B2 · kind B2 · utility
12Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 21, 2003 |
| Grant date | Dec 14, 2004 |
| Priority date | — |
| Expiry date | May 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/542
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency divider circuit is disclosed that generates output signals having a frequency substantially half of the frequency of the input signal. The circuit comprises two D-Flip-Flop circuits wherein one employs the said input signal and the other one employs the complement of the said input signal, and each of the two D-Flip-Flop circuits consists of a pair of loading transistors, two regenerative pairs coupled with each others, and two common-gate switches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.