Reconfigurable filter architecture
US6831506B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2003 |
| Grant date | Dec 14, 2004 |
| Priority date | — |
| Expiry date | Sep 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/1291
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a reconfigurable filter having a bandwidth and frequency offset that are independently configured, thereby allowing the filter to realize any filter pole. In general, the filter includes a filtering stage and a reverse gain stage. The filtering stage has a bandwidth configured by a bandwidth control signal from control logic and a frequency offset configured by an offset control signal. The reverse gain stage provides the offset control signal to the filtering stage based a reverse gain control signal from the control logic and the output signal. Based on the bandwidth control signal and the reverse gain control signal, the bandwidth of the filter is configured independently from the frequency offset of the filter and the frequency offset is configured independently from the bandwidth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.