Cryptographic accelerator
US6831979B2 · kind B2 · utility
27Cited by
18References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 14, 2001 |
| Grant date | Dec 14, 2004 |
| Priority date | — |
| Expiry date | Jun 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cryptographic accelerator for handling instruction-intensive bit permutations. The cryptographic accelerator comprises a selector and a plurality of buses coupled to the selector. Herein, at least one of the plurality of buses includes signal lines routed to perform a bit permutation operation incoming data. The bit permutation operation is one of a plurality of operations associated with a symmetric key function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.