Apparatus, method and computer program product for stopping processors without using non-maskable interrupts
US6832338B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2001 |
| Grant date | Dec 14, 2004 |
| Priority date | — |
| Expiry date | Jan 23, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3632
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, method and computer program product for stopping processors in a multiprocessor system without using non-maskable interrupts are provided. With the apparatus, method and computer program product, at system initialization time, a copy of the operating system (OS) kernel is copied to a new physical location in memory. When a processor enters the debugger due to the occurrence of an event, the debugger switches its virtual-to-physical address mapping to point to the new copy of the OS kernel. The original copy of the OS kernel is then modified by inserting breakpoints, e.g., interrupts, in a repeating pattern in the text of the original copy of the OS kernel, with the exception of the breakpoint handler text in the original copy of the OS kernel. A cache flush of the remaining processors is then instigated thereby forcing the remaining processors to refetch instructions from the OS kernel. When the remaining processors fetch the OS kernel instructions, the instructions are fetched from the modified OS kernel. Thus, the processors encounter the inserted breakpoints and enter a breakpoint handler. The breakpoint handler then, by virtue of the switched virtual-to-physical a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.