Semiconductor testing apparatus and semiconductor testing method
US6833715B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2003 |
| Grant date | Dec 21, 2004 |
| Priority date | — |
| Expiry date | Jul 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3696
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor testing apparatus and a semiconductor testing method are provided which permit an apparatus having an inexpensive configuration to perform, with precision, the acceptance-or-rejection determination and measurement test of a semiconductor integrated circuit having a large number of output terminals each for outputting a multi-gradation level output voltage. The semiconductor testing apparatus includes output voltage testing device and comparison voltage generation data inputting device. The output voltage testing device includes test voltage inputting device, comparison voltage generating device, a high level comparator, a low level comparator, and comparison result outputting device. The high level comparator and the low level comparator constitute comparing device for comparing a voltage to be tested, with a comparison voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.