High-frequency multi-selection prescaler
US6834094B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2003 |
| Grant date | Dec 21, 2004 |
| Priority date | — |
| Expiry date | Dec 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multi-selection prescaler for dividing an input signal according to a ratio to obtain a desired frequency. The circuit has of a plurality of logic gates and D-flip-flops: a first frequency divider for receiving an input signal and generating a divided frequency; a second frequency divider connected to the first frequency divider for performing a further frequency division based on a selection switch having a plurality of selection signals and a plurality of AND gates; a module control for performing a logic operation on the selection signals and an external control signal (MC) by OR gates and being connected to the first frequency divider to control the divided frequency of the first frequency divider; and an output selection circuit connected to the second frequency divider for selecting output signal according to the selection signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.