Method for making interconnect structures
US6835644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2002 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Jan 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32136
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making interconnect structures, particularly in a semiconductor integrated circuit, is described. The method comprises the steps of:forming a conductive layer;forming of an insulating layer above said conductive layer;creating a plurality of holes in said insulating layer and filling the holes with tungsten thereby forming tungsten plugs, such that said tungsten plugs are in electrical contact with the conductive layer.A patterned metallisation layer that overlies said insulating layer (is formed by means of following steps:forming a continuous metallisation layer,forming an organic mask,etching in plasma said continuous metallisation layer,removing the organic mask in a dry way, andimmersing the obtained wafer including the layers (3, 4, 5) and the tungsten plugs in a cleaning solution to remove the post-etching residues.Before immersing into said cleaning solution, the wafer is submitted to a plasma treatment containing F, H or a mixture of F and H. This plasma treatment may be combined with said dry removal of the organic mask, with the purpose of eliminating tungsten plug erosion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.