System for matching rise and fall times of drive signals in a digital to analog converter
US6836234B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 22, 2003 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Sep 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04123
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system (e.g., a digital-to-analog converter (DAC)) includes a digital section and an analog section. The digital section has a driver portion that generates drive signals based on received respective digital input signals. The drive signals are received at respective switches in the analog section. The driver portion includes logic gates that are used to generate the drive signals, such that a rise and fall time of complementary pairs of drive signals are substantially equal. The driver portion can optionally include an acceleration system to accelerate the rise and fall times of the drive signals. The switches generate respective analog signals from the drive signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.