Method of decreasing delay through frame based format converters
US6836294B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2001 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Aug 6, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/440218
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus converts an input video signal having a first format into an output video signal having a second format. A formatter receives the first video signal and divides each field or frame into an active video top and bottom half. Two format converters receive and process the two halves of the active video images from the formatter and provide respective halves of the active video image for rejoining into the second format. A demultiplexer receives the two halves of the active video images from the two format converters and combines the active video upper and active video lower halves of the fields or frames into the output video signal having a second format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.