System and method for programming loss of synchronization in a multidimensional digital frame structure
US6836485B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2000 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Nov 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0608
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention programs the number of frames, with non-recognizable frame synchronization bytes (FSBs), required for the communication link to fall out of synchronization, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the number, value, location, bandwidth, and the bit error rate (BER) of the located FSBs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.