Preplating of semiconductor small outline no-lead leadframes
US6838757B2 · kind B2 · utility
6Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2001 |
| Grant date | Jan 4, 2005 |
| Priority date | — |
| Expiry date | Jul 6, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
For a leadframe for use with integrated circuit chips, a continuous strip of sheet-like base metal is pre-plated with a layer of nickel fully covering the base metal, further on one surface with a palladium layer in a thickness suitable for bonding wire attachment, and on the opposite surface with a layer of either palladium or lead-free solder in a thickness suitable for parts attachment. The leadframe structure is then stamped from the sheet so that the base metal is exposed at the stamped edges, enhancing adhesion to molding compounds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.