Low memory and MIPS efficient technique for decoding Huffman codes using multi-stage, multi-bits lookup at different levels
US6839005B1 · kind B1 · utility
3Cited by
9References
18Claims
0Family size
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Key dates
| Filing date | Nov 12, 2003 |
| Grant date | Jan 4, 2005 |
| Priority date | — |
| Expiry date | Nov 12, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Present herein is a low memory and MIPS efficient technique for decoding Huffman codes using multi-stage, multi-bits lookup at different levels. A binary tree is cut at levels depending on the quotient of the number of existing nodes and the number of possible nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.