Printed-wiring substrate and method for fabricating the same
US6841740B2 · kind B2 · utility
6Cited by
5References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2001 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | Jan 17, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49176
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A printed-wiring substrate including a capacitor element, as well as a method for fabricating the printed-wiring substrate. An insulating substrate 3 is molded by placing a capacitor element 13 in a mold and charging a resin 4 into the mold. Therefore, the capacitor element 13 having a size (i.e., electrostatic capacitance) sufficient to suppress switching noise of an IC chip 15 and stabilize operation power voltage can be disposed, while providing a dimensional margin. Since the possibility of failing to embed the capacitor element 13 decreases, the printed-wiring substrate can be fabricated at reduced cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.