Non-volatile memory apparatus and method capable of controlling the quantity of charge stored in memory cells
US6842379B2 · kind B2 · utility
2Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2003 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | Feb 13, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital memory system (30) includes a memory cell (10), a bit line (12), a voltage generator (320) a controller (90) and a charge integrity estimating module (135). A series of successively larger operating voltages are transmitted to the cell from the voltage generator. The controller determines whether a predetermined value has been stored in the cell. The charge integrity estimating module detects the quantity of charge in the memory cell, for example, by using a sense amplifier (170).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.