Method and apparatus for synchronizing a packet based modem supporting multiple X-DSL protocols
US6842429B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2001 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | May 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/66
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The current invention provides a digital signal processor which supports multiple X-DSL protocols and a multiplicity of channels on a single chip. Each channel is packetized and each packet includes control information for controlling the performance of the components/modules on the transmit and receive path. Further flexibility is derived from an architecture which incorporates discrete and shared modules on the transmit path and the receive path. The transmit path and receive path modules are collectively controlled by control information in selected ones of the packets and operate on each channel's packets at an appropriate rate, and protocol for the channel. A digital signal processor (DSP) is disclosed which incorporates these features. The DSP exhibits a favorable form factor, and flexibility as to protocols and line codes, and numbers of channels supported.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.