Frequency-dependent impedance synthesis for DSL interface circuits
US6842518B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2001 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | Dec 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M3/005
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An impedance warping circuit (IWC) and technique for compensating the effect of a blocking capacitor within a transformer of an interface circuit for passing plain old telephone service (POTS) band and asynchronous digital subscriber line (ADSL) band signals on signals having frequencies in the POTS band. The IWC does not significantly affect the performance of the interface circuit in the ADSL band. The IWC synthesizes impedance to compensate the frequency-dependent deviation in the termination impedance across the tip/ring lines. The resulting termination impedance may be designed to conform to the Telcordia Standard of 900 Ω+2.16 μF or other telecommunication standards throughout the entire POTS band.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.