Method and apparatus for memory efficient fast VLAN lookups and inserts in hardware-based packet switches
US6842791B2 · kind B2 · utility
9Cited by
6References
23Claims
0Family size
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Key dates
| Filing date | Mar 20, 2002 |
| Grant date | Jan 11, 2005 |
| Priority date | — |
| Expiry date | Jan 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/745
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A technique for decreasing VLAN lookup times in hardware-based packet switches by emulating the functionality of a content addressable memory (CAM) with software and random access memories (RAM). The decrease in lookup time is achieved by using content from the data packet to index directly into a table that stores forwarding information. Since the forwarding information is addressed directly by content from the packet, the need to spend time and resources sorting through the table of forwarding information with a key search is eliminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.